1. Field of the Invention
The present invention relates to semiconductor devices such as photosensors, and more particularly to improvements to the insulation between conductors laminated through a semiconductor layer in a semiconductor device.
2. Related Background Art
Recently, a technique has been developed by which a plurality of thin film semiconductor elements are formed on a substrate in a semiconductor device for use in an IC, an LSI, a liquid crystal device, a photosensor or the like. It requires a plurality of intersections of leads for wiring among the respective elements.
Especially, it is necessary to form a total of 10,000 or more thin film transistors (TFTs) on the same substrate in a liquid crystal display. Also, it is necessary to form a total of 1,728 photosensor elements, 8 photosensor elements/1 mm and a like number of TFTs corresponding to the respective photosensor elements on the same substrate in an A-4 size document reading equimagnification line sensor.
Therefore, much more intersections are required for wiring among the elements. When a wiring matrix is employed to miniaturize a device which reduces the number of elements, for example TFT, the number of intersections are 10,000 or more.
Such intersections are preferably insulated by using semiconductor layers and insulating layers which constitute parts of elements without providing special purpose insulating layers in order to simplify the intersection forming process and reduce the cost.
FIG. 1(A) is a schematic plan view of one example of a semiconductor device and FIG. 1(B) is a schematic cross-section view taken along the line I--I in FIG. 1(A). For the sake of illustration, other attached portions are also shown.
The present invention will be described illustratively on the basis of a device shown in FIG. 1 because the present invention is preferred in a close-contact type photoelectric conversion apparatus which uses a photoelectric type line sensor in which electrons are used as carriers. Herein, a signal reading system employs a wiring matrix. Formed on a substrate 1 are common wiring leads 4 and shielded leads 11, as shown, on which an insulating layer 5, an intrinsic semiconductor layer (hereinafter referred to as "i-layer") 6 and an n.sup.+ -layer 7 for ohmic contact are superposed. Individual electrode leads 8 are formed extending from the photosensors 9 and connected through contact holes 10b to the common leads 4.
In such wiring matrix, a constant potential is applied to each shield lead 11 by a power source Va. This is intended to prevent crosstalk caused by capacitative coupling among the common wiring leads 4.
Each common lead 4 is connected to a current-to-voltage converter (not shown) including an operational amplifier which converts a photoelectric current from the photosensor 9 to a voltage which is then output from the device. Each common lead 4 in this arrangement is at a reference voltage comprising a ground potential.
However, the semiconductor device has the following problems which the inventors found as a result of many experiments.
FIG. 2 is a schematic cross-section view taken along the line II--II in FIG. 1(A).
As mentioned above, each shielded leads 11 is supplied with a positive voltage from the power source Va, and each individual electrode lead 8 is connected to the corresponding common lead 4, so that the reference voltage is substantially at a ground level. In FIG. 2, each shielded lead 11 at higher potential compared to the corresponding individual electrode lead 8.
Under such conditions, electrons are supplied from each individual lead 8 through n.sup.+ -layer 7 to i-layer 6 and hence to the insulating layer 5 since the leads 8 are low in potential compared to the shielded leads 11.
It has been found that if the insulating layer 5 is defective or locally thinner than its remaining portion due to variations in the manufacturing process, an electric field is intensified at that portion thereby probably causing dielectric breakdown. The electric field formed across the space shown by the double headed arrow A is also intensified. If impurity ions or moisture are present on the side of the insulating layer 5 and the surface of leads 11, the lower layer leads 11 will be with a high probability melted and disconnected by electrolysis.
Since insulation depends on the thickness of the insulating layer 5, overetching, for example, shown by 19, caused in the manufacturing process, if any, would be likely to lower the electrically insulating strength, yielding and reliability.
Such a problem would occur not only at the intersections of shielded leads 11 and the individual electrode leads 8, but also at intersections 22" of leads 22 to which a positive voltage is applied by a power source Vb and leads 22' which are grounded (see FIG. 1(A)).